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Test Publications

  

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Title: LogicVision Announces Memory BIST and Repair Solutions for 45nm SOI Foundry Customers
Author:NanoWerk
Date:3/10/2009
Type:Product Release
Source: LogicVision, Inc.
Subjects:Built-In Self Test (BIST), memory BIST, Built-In Self Repair (BISR)
Abstract: LogicVision, Inc., a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced that IBM Corporation has included LogicVision's ETMemory™ memory BIST and on-chip self-repair solution for embedded memory tes... [more]
Title: Industry-First, Most Comprehensive DDR3 Test Suite
Author:Agilent Technologies, Inc.
Date:3/3/2009
Type:Product Release
Source: Agilent Technologies, Inc.
Subjects:memory test
Abstract: Agilent Technologies Inc. (NYSE: A) today introduced the industry's first and most comprehensive DDR3 protocol debug and validation test suite for digital designers developing computer and embedded memory applications. The test platform offers the i... [more]
Title: A leap forward in ease-of-use and visualization
Author:Ray Dellecker
Date:2/4/2009
Type:Product Release
Source: JTAG Technologies, Inc.
Subjects:Boundary-scan development tools
Abstract: JTAG Technologies groundbreaking advances in the boundary-scan tool space continue with the latest release of its development and hardware debug tools, JTAG ProVision and Visualizer. Recognized as the leading development tool for all boundary-sca... [more]
Title: GSA Award Winner Tilera Selects LogicVision Memory BIST to Achieve Silicon Quality and Yield Goals
Author:IT News Online
Date:1/23/2009
Type:Announcement
Source: LogicVision, Inc.
Subjects:Built-In Self Test (BIST), memory BIST, Built-In Self Repair (BISR)
Abstract: LogicVision, Inc. , a leading provider of semiconductor built-in-self-test (BIST) and diagnostic solutions, today announced that Tilera(R) Corporation, developer of the breakthrough TILE(TM) family of high-performance processors for the embedded mar... [more]
Title: Redefining Memory Test
Author:Scott West, Evaluation Engineering
Date:1/1/2009
Type:Magazine Article
Source: Verigy
Subjects:IC testing, IC ATE, memory test
Abstract: You could use full-function pin electronics for all your parallel memory test sites at high cost and with large inefficiencies, or you could simply wire-OR duplicate sites and live with the inevitable interactions. Instead, the author describes the ... [more]
Title: Tune and test DDR memory
Author:Andrew Fish, Kozio -- Test & Measurement World
Date:12/1/2008
Type:Magazine Article
Source: Test & Measurement World
Subjects:memory test
Abstract: Modern electronic devices rely on stable DDR (double data rate) memory for fast, reliable operation. A shortened time to market, however, often limits the amount of product testing that you can perform. Microprocessor-based products released with un... [more]
Title: Teradyne Talks Growth Initiatives, Pursues Entire ATE Market
Author:Sally Cole Johnson, Contributing Editor -- Semiconductor International
Date:8/11/2008
Type:Magazine Article
Source: Teradyne
Subjects:ATE business
Abstract: In the competitive ATE industry, managing through the semiconductor industry's changing dynamics profitably might just be the ultimate test. Teradyne has broadened its product offerings, rolling out five new products this year. The company also has ... [more]
Title: Memory tester offers improved efficiency
Author:EE Times Asia
Date:7/11/2008
Type:Product Release
Source: Teradyne
Subjects:memory test, ATE
Abstract: Teradyne Inc. has expanded its family of Magnum memory test systems with the launch of Magnum II, which delivers higher speeds and performance requirements for flash and embedded memory systems. "This memory tester is based on the Magnum I architect... [more]
Title: Virage Logic Delivers Open RTL to Test Floor Embedded Memory Test and Repair Subsystem
Author:Design and Reuse
Date:6/2/2008
Type:Product Release
Source: Virage Logic
Subjects:Built-In Self Test (BIST), memory BIST, Built-In Self Repair (BISR)
Abstract: Virage Logic Corporation, the semiconductor industry’s trusted IP partner and pioneer in Silicon Aware IP™, today announced the availability of a completely open register transfer level (RTL) to test floor embedded memory test and repair subsystem b... [more]
Title: Advantest eases high-volume DDR3-SDRAM testing
Author:EE Times Asia
Date:5/13/2008
Type:Product Release
Source: Advantest America
Subjects:memory test, ATE
Abstract: Advantest Corp. is touting its T5503 high-throughput memory test system as having the industry's highest parallel test capability of up to 128 devices. The T5503 was developed specifically to address the challenges of high-volume production test of... [more]
Title: Improving Yield With Retooling and Robust Infrastructure
Author:Yervant Zorian, Ph.D.; Gevorg Torjyan, Ph.D.; and Dan Nenni, Virage Logic
Date:4/1/2008
Type:Magazine Article
Source: Virage Logic
Subjects:memory test
Abstract: Memories are used by foundries and semiconductor companies for process ramping and yield learning because of their densities and regular structures. With this central implementation, the yield learning curve can be improved. Such an exercise is desc... [more]
Title: Test solution rolls for DDR2, DDR3 SDRAM
Author:EE Times Asia
Date:3/19/2008
Type:Product Release
Source: Tektronix
Subjects:memory test
Abstract: Tektronix Inc. has released a comprehensive test tool set for DDR2 and new DDR3 SDRAM technology, developed to deliver higher performance data rates. The Tektronix DDR test solution, including the new TLA7BB4 acquisition module, supports all speeds ... [more]
Title: Spansion Reduces Reliance on Manufacturing Services
Author:CNNMoney.com
Date:3/19/2008
Type:Announcement
Source: Spansion Inc.
Subjects:memory test, flash test, built-in self test (BIST)
Abstract: Spansion Inc. , the world's largest pure-play provider of Flash memory solutions, today announced that its focus on manufacturing excellence is expected to reduce its reliance on foundry and subcontractors by approximately $50 million per quarter in... [more]
Title: Teradyne expands reach to flash test with $325M Nextest buy
Author:Ann Steffora Mutschler, Senior Editor -- Electronic News
Date:12/12/2007
Type:Announcement
Source: Teradyne
Subjects:ATE business
Abstract: To capture market share in the fast-growing flash memory test segment, estimated to be more than $700 million in 2006, San Jose-based SoC test provider Teradyne Inc. said today it will acquire flash memory and SoCs automatic test equipment supplier,... [more]
Title: Simplify DDR validation with SI methods
Author:Min-Jie Chong, Memory Test Solutions, Agilent Technologies, Inc.
Date:9/17/2007
Type:Magazine Article
Source: Agilent Technologies, Inc.
Subjects:memory test, signal integrity
Abstract: As speed increases, validation effort increases exponentially as well. For the memory system to function accurately, its signal integrity (SI) performance must meet certain minimum requirements. SI is the key to system interoperability—it guarantees... [more]
Title: Synopsys acquires Mosaid mem tech, IP
Author:EE Times Asia
Date:7/18/2007
Type:Announcement
Source: Synopsys, Inc.
Subjects:memory test
Abstract: Synopsys Inc. has bought Mosaid Technologies Inc.'s DDR memory controller and PHY semiconductor IP assets for about $15 million in cash. The agreement is expected to close next month, with the payment subject to a $2 million holdback for one year. A... [more]
Title: Verigy debuts V5000ep for small production runs
Author:Test & Measurement World
Date:7/17/2007
Type:Product Release
Source: Verigy
Subjects:memory test, ATE
Abstract: Verigy at Semicon West introduced the V5000ep, which allows customers to perform quality assurance, characterization, and small-lot production at wafer sort and final test on new memory devices, including NOR, NAND, DRAM, and SRAM devices as well as... [more]
Title: Gartner: Upcoming Lull In Demand For Chip Equipment
Author:Electronic Design
Date:7/11/2007
Type:Report
Source: Gartner, Inc.
Subjects:semiconductor test, ATE business
Abstract: The lull in demand for semiconductor equipment has arrived, according to a report released today by Gartner Research. Gartner predicts worldwide semiconductor capital equipment spending will total $43 billion in 2007, a 2.7 percent increase from... [more]
Title: DRAM assembly and test houses cautious on expansion
Author:EE Times Asia
Date:6/28/2007
Type:Report
Source: Taiwan Semiconductor Industry
Subjects:memory test
Abstract: Although DRAM assembly and test (A&T) houses traditionally follow DRAM makers' expansion moves, DRAMeXchange reported they are taking a cautious stance this year following last year's over expansion, which resulted in a severe DRAM price fall in the... [more]
Title: Adopting the Right Solution for Embedded Memory Test
Author:Steve Pateras, Logic Vision
Date:6/1/2007
Type:Web posting
Source: The BestTest Newsletter
Subjects:Built-in Self Test (BIST)
Abstract: Embedded memories represent a significant and growing percentage of today’s systems-on-a chip (SoCs) and as a result, memory built-in-self-test (BIST) and yield optimization solutions have gained significant importance. In its simplest form, mem... [more]

    1 - 20
of 96 Publications Found
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