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| Title: |
Troubleshooting Analog Circuits
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| Author: | Pease, Robert A. |
| Date: | 1/1/1991 |
| Type: | Book |
| Source: |
Butterworth Heineman
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| Subjects: | Analog Testing, Troubleshooting & Measurements |
| Abstract: |
Bob Pease is one of the legends of analog design, providing regular columns in many of the design magazines. This book is a compilation of his "battle-tested" methods. It provides an intuitive grasp of where problems are likely to show up and how to...
[more] |
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| Title: |
Neural Models and Algorithms for Digital Testing
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| Author: | Srimat T. Chakradhar, Vishwani D. Agrawal, and Michael L. Bushnell |
| Date: | 1/1/1991 |
| Type: | Book |
| Source: |
Kluwer Academic
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| Subjects: | Digital Testing, Test Programming and Diagnosis |
| Abstract: |
Neural Models and Algorithms for Digital Testing presents a novel solution to a difficult problem, namely, test generation for digital logic circuits. An optimization approach to this problem has only recently been attempted. The authors propose a n...
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| Title: |
Assessing Fault Model and Test Quality
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| Author: | Kenneth M. Butler and M. Ray Mercer |
| Date: | 1/1/1991 |
| Type: | Book |
| Source: |
Kluwer Academic
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| Subjects: | Digital Testing, Test Programming and Diagnosis |
| Abstract: |
Assessing Fault Model and Test Quality reports original research on the nature of logical fault models and their interactions with ATPG algorithms. The monograph condenses an extensive survey of literature pertaining to testing, test quality, defect...
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| Title: |
Microelectronic Reliability, Vol 1
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| Author: | Edward B. Hakim |
| Date: | 1/1/1989 |
| Type: | Book |
| Source: |
Artech House
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| Subjects: | Digital Testing, Test Programming and Diagnosis |
| Abstract: |
Let twelve specialists show you how to test, analyze, and achieve better Microelectronic Reliability of silicon and GaAs devices. Microelectronic Reliability, Volume I: Reliability, Test, and Diagnostics offers you detailed, original works on the to...
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| Title: |
IEEE-488 General Purpose Instrumentation Bus Manual
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| Author: | Anthony J. Caristi |
| Date: | 1/1/1989 |
| Type: | Book |
| Source: |
Academic Press
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| Subjects: | Automatic Test Equipment (ATE) and Instrumentation |
| Abstract: |
Written by a working designer of IEEE-488 installations, this guide covers GPIB addressing and communications, complete GPIB protocols and hardware (including the new IEEE-488.2 standard which has solved many of the user problems plaguing the GPIB i...
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| Title: |
Built In Test for VLSI: Pseudorandom Techniques
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| Author: | Paul H. Bardell, W. H. McAnney, J. Savir |
| Date: | 1/1/1987 |
| Type: | Book |
| Source: |
John Wiley & Sons
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| Subjects: | Testability & Built-in Test |
| Abstract: |
This handbook provides ready access to all of the major concepts, techniques, problems, and solutions in the emerging field of pseudorandom pattern testing. Until now, the literature in this area has been widely scattered, and published work, writte...
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| Title: |
MIL-STD-2165
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| Author: | US Navy |
| Date: | 1/26/1985 |
| Type: | Standard |
| Source: |
Airtime
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| Subjects: | Testability Program Planning, Testability Assessment, Testability Plan, Built In Test (BIT) |
| Abstract: |
1. Testability addresses the extent to which a system or unit supports fault detection and fault isolation in a confident, timely and cost-effective manner. The incorporation of adequate testability, including built-in test (BIT), requires early and...
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| Title: |
The Assessment of LOGMOD as a Testability Design Tool
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| Author: | Bill Keiner |
| Date: | 12/31/1980 |
| Type: | Standard |
| Source: |
DETEX
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| Subjects: | DFT standard |
| Abstract: |
The DETEX Maintenance Aid, based upon the Logic Model concept, has had good success when
compared against traditional testing methods. This is perhaps an indication of the expected superiority of a
standardized, methodical, automated approach over...
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| Title: |
Congressional Letter for Testability
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| Author: | Bill Keiner |
| Date: | 6/20/1980 |
| Type: | Standard |
| Source: |
DSI
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| Subjects: | standard for testability |
| Abstract: |
The recommendation was considered by the Testability Task Group at the JLC Program Review on 11 June 1980 at which time Dr. DePaul presented his approach to the group. This was followed by a visit to Villa Park by Phil Writer (NOSC 921) on 18 June f...
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| Title: |
Built-in Logic Block ObservationTechniques
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| Author: | Bernd Konemann, Joachim Mucha and Gunther Zwiehoff |
| Date: | 1/1/1979 |
| Type: | Conference Article |
| Source: |
International Test Conference
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| Subjects: | built-in self test, BILBO |
| Abstract: |
Parallel signature analysis with multiple- input signature registers allows to observe the data flow at internal testpoints on complex digital ICs. The test data are sampled and coded on- line at the rated internal speed of the ICs. The information ...
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