What you will learn:
This course will teach you what is involved in developing a test program for an ATE. If you have never written a test program before, the course will illustrate the difficulties and point out traps that can make test programming a nightmare. For those who have experienced these problems, the course will provide a structured approach that will help avoid these problems in the future.
Abstract:
This course provides a structured approach to the development of test programs. You will learn how to develop the various planning stages of functional board test program. The lessons learned will apply to systems and IC level tests as well as to board level tests, including In-Circuit.
Who should attend:
Anyone who works with ATE will need to understand what is involved in test program development. Understanding of basic digital circuits is needed to follow the examples in class.
Detail:
COURSE OUTLINE:
IC and Component Testing
In-Circuit Testing
Boundary Scan Testing
Functional Board Testing
- Stuck-at Fault Models
- Fault Detection
- Fault Isolation
- Path Sensitization
Simulation
- The Simulation Model
- Good Circuit Simulation vs. Fault Simulation
- Fault Scoring
- Guided Fault Probing
- Fault Dictionary
Analysis Before Coding
- Testability Concerns
- Timing Considerations
- Bus Considerations
Interfacing and Interface Test Adaptors
- Mechanical Interfacing
- Electrical Interfacing
- Test Adapter Design
- Test Adapter Test
The Test Strategy Report (TSR)
- Why we need TSRs?
- Contents of the TSR
- TSR Review Process
Automatic Test Pattern Generation (ATPG)
- Is ATPG for real?
- When is ATPG useful?
- ATPG Techniques
- Limitations of ATPG
ATE Languages
- Characteristics
- Standardization
- ATLAS
- ATE Language Translation
Instructor: Louis Y. Ungar
Louis Y. Ungar is president of A.T.E. Solutions, Inc., a leading independent test and testability consulting and educational firm. He has taught ATE and Testability courses at the University of California at Los Angeles (UCLA) and throughout industry. Mr. Ungar is a consultant to The American Society of Test Engineers, has served as Testability Chair for the Surface Mount Technology Association and has served on committees for various IEEE standards, including those of IEEE Std. 1149.x. Mr. Ungar holds a B.S.E.E. and Computer Science degree from the UCLA and has completed his course work towards a M.A. in Management.