||How to Design for Testability (DFT) for Today's Boards and Systems
Detailed review of the various guidelines covered in the SMTA/TMAG Testability Guidelines. Part 1 of the Webtorial will introduce attendees to the issues surrounding testing of electronic circuit boards and systems. It introduces testing concept and the mix of testers normally used. This includes the JTAG/IEEE-1149.1 boundary scan as well as built-in self test (BIST). With a combination of these technologies, the idea of non-intrusive board (and system) test is explored. The Webtorial takes the view that DFT is the best way to improve test performance and cost effectiveness. Towards that end Part 2 provides specific DFT guidelines. It concludes with exploring new standards and developments in DFT that will improve testing of boards and systems in the future.