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Online Catalog of Educational Courses and Resources

 

Page 1 of 3 of Users' Guide
Welcome to the Online Catalog of Courses and Educational Resources. There are many ways we have for you to find what you want from this catalog:
  1. Using the "Search for Topic or Format-Text" box you can filter the selections by
      a. Keywords, such as "in-circuit," "environment," etc.
      b. Course formats, such as "public," "private," etc.
  2. Read the "What You Will Learn" section next to each course.
  3. For each course of interest, you can click the hyperlinked "Details" to see the detailed course outline.
  4. Check the "Select" button next to titles that are of interest to you.
  5. Press the "More on Selected Titles" button to see what formats and dates are available for these selected courses.
Search for Topic or Format-Text:
20 Records Found
Select E Title What You Will Learn Details
Analog Test and Fault Isolation The problems that you will encounter when you try to test analog circuits with an ATE. The course will show how accuracies and resolutions can affect your test results. You will also learn to deal with analog simulation and fault simulation issues. The IEEE-1149.4 Mixed Signal Testability as well as the IEEE-1149.6 mechanisms will also be explored. Details
ATE Selection and Management Presented from a non-biased perspective, this course will teach you the decision process for test strategy selection. It provides a generic approach and alert you to things you should consider for ATE investment. Details
ATE Selection, Design and Programming This course covers every aspect of a test engineer's responsibility. Participants will learn how to select an automatic test equipment (ATE) from the number of choices and generically different types available. You will learn how to build an ATE from instrumentation and other building blocks. You will learn the bussing requirements of the IEEE 488, VXIbus, and PC-based instruments. You will also learn the software issues. The course will teach you how to approach a functional test programming activity for digital circuits. (In the longer, three-day course, analog test programming is also covered.) Finally, you will learn test management issues, such as test program development estimation, acquisition and quality assurance. Details
ATLAS This course will teach you how to write test procedures and code for many of the ATEs used in the military and airline industries using the Abbreviated Test Language for All Systems (ATLAS) a standard that is maintained by the IEEE. Details
Building your own ATE You will learn how to put together an Automatic Test Equipment (ATE) from instrumentation built to the IEEE-488 (GPIB or HPIB) and VXIbus and PXI standards. Details
Cost Effective Tests Using ATE, DFT and BIST The two main reasons to test are 1) to eliminate failures escaping to your customers and 2) to reduce the life cycle cost of a product by eliminating penalty costs associated with delivering potentially faulty units. Many people have traded one of these requirements for the other, but with the advent of more sophisticated automatic test equipment (ATE), more attention paid to design for testability (DFT) and utilizing built-in self test (BIST), it is possible to do both. This tutorial provides a thorough understanding of each of these tools and strategies for more comprehensive and cost-effective testing. The course will combine the technical aspects of testing today’s complex circuits with the economics demanded by lower costs, faster times to market and a higher rate of obsolescence for both electronic products and test equipment. Details
Design for Testability and Built-In Self Test for Boards and Systems You will be exposed to structured scan techniques standardized by the IEEE-1149.1 (JTAG), by other IEEE-1149.x, by the IEEE-1500, and by the recently released IEEE-1687 standards. The course will cover memory BIST, logic BIST and analog BIST and how they can be used for board and system test. It will also cover built-in test (BIT) software, and its goal to provide diagnostic information. You will obtain convincing reasons for utilizing DFT and BIST techniques in your organization's board and system design. Details
Design for Testability and for Built-in Self Test In this comprehensive course you will learn all aspects of Design for Testability (DFT), from what it is, why you might need it, why someone would object to it, and what it can and cannot accomplish. You will learn how today's technology has become elusive to certain failure modes and how important it is to expose them through more testable designs. This 3-day class will encompass DFT techniques for ICs, ASICs, SoCs, FPGAs, boards, systems, and even prognostic health management. First you will learn some simple techniques to enhance observability and controllability. You will learn how you can access hundreds of internal points with as few as four additional edge connector pins. You will learn specific guidelines for both digital and analog circuit testability. You will learn structured testability techniques, such as internal and boundary-scan. You will come away with a deep understanding of the IEEE 1149.1 (JTAG) standard's operation, use and even its limitations. You will also learn later standards, such as IEEE-1149.4, .6, .7 as well as IEEE-1500, 1532, 1581 and 1687. You will also learn some new techniques in testability, including IDDQ testing and I/O Mapping. In the second part of the course, you will learn what built-in [self] test (BIST) is and how it can be specified. You will learn structures such as linear feedback shift registers (LFSRs), signature analyzers, and pseudo-random signal generators. With these building blocks you will be able to evaluate a number of BIST architectures for Logic BIST and Memory BIST. You will learn BIT Software techniques and consider the effect false alarms have on BIT. You will finally be able to specify BIT for your products and look at the possibilities of BIT taking over some of the ATE functions. Details
Electromagnetic Compatability Test and Design You will learn the principles of electromagnetic compatibility (EMC) as it applies to military and non-military compliance. The course introduces EMC compliance requirements and methods by which they can be tested. It covers techniques designers should use to improve compatibility Details
Environmental and Reliabilty Testing This course covers the environmental and reliability tests performed during design and in manufacturing. You will learn about reliability prediction techniques and factors. You will learn what you can expect from reliability growth testing environmental stress screening (ESS). You will know how environmental stress screening (ESS) is used to flush out flaws introduced during processing, fabrication and assembly. When highly accelerated for longer duration, this is called Reliability Test. You will learn how Reliability Test can flush out design flaws resulting from incompatible interfaces, from erroneous functional performance in different environments and from weak components. By the completion of this course you will be able to formulate environmental and reliability test strategies for your own products. Details
Failure Mode and Effects Analysis (FMEA) You will learn how to prepare and utilize FMEA to improve reliability, safety, testability, and maintainability. This course will describe FMEA methodology and its multiple uses for a more reliable, testable and maintainable product. Details
Instrumentation and Instrument Buses An ATE consists of discrete instruments capable of applying stimuli and making accurate measurements under the control of a computer. You will learn how each of these elements does its job and what realistic expectations you can have. Details
Integrated Diagnostics and Artificial Intelligence How integrated diagnostics and artificial intelligence (AI) can be used to improve product support. You will learn the basic principals of artificial intelligence and how they apply to test and diagnosis. You will also learn diagnostic concepts, including dependency modeling and optimizations. Details
Introduction to Automatic Test System Software Standards and to Automatic Test Markup Language (ATML) You will get a comprehensive picture of industry standards applicable to Automatic Test Systems (ATS) software and will be introduced to the emerging Automatic Test Markup Language (ATML) standards. You will learn how the adoption of ATML and other standards can help you reduce the cost of Automatic Test Equipment (ATE) and Test Program Set (TPS) development, operation, and modernization. Details
ISO-9000 and Quality Assurance You will learn to identify the ISO-9000 standards relevant to your organization. You will also learn the planning and implementation process associated with installing an ISO-9000 quality system. Details
Software Design for Testability (SDFT) The latest theory and practice of Software Design for Testability (SDFT) will be explained, primarily through comparisons and analogies to the well-established discipline of hardware DFT. Details
Software Test, Reliability and Quality Assurance You will get practical answers to the following questions: When should you start testing and when can you stop testing? How do you predict software bug rates? Which defects are acceptable and why? What software metrics should be collected to measure testing progress? How do you plan for testing, debugging, and fixing software? What can you look for in code to verify that software reliability has been designed into the software? This course prepares you to create better software and to evaluate software produced by others. Details
Standards in Test You will be introduced to most of the Military and Commercial Standards that affect the way test is performed and interpreted by both military and commercial concerns. Details
The Economics of Test and Testability Why test is a solution to an economic problem How non-technical management views return on investment (ROI) and how to translate technical benefits to these terms Existing formulas for the cost and benefits of IC, board, and system tests How behavioral economics applies to test and what we can learn from it. Details
VLSI Simulation and Test Generation The stuck-at models used in simple logic is becoming obsolete when we wish to test Very Large Scale Integrated circuits. You will learn new approaches to test that can be used to test highly complex circuits. Details

20 Records Found